STC12C5A60S2 80C51 8051 Mikrocontroller DIP-40 MCU Entwicklerset Board 5V Netzteil

STC12C5A60S2 80C51 8051 Microcontroller Development Set © androegg

STC12C5A60S2 80C51 8051 Microcontroller Development Board © androegg

STC12C5A60S2 80C51 8051 Microcontroller DIP-40 IC © androegg

5V 1A Power Supply © androegg

Der STC12C5A60S2 8051 80C51 Entwickler Set beinhaltet

• 1 Stück STC12C5A60S2 Single 8051 80C51 DIP-40 IC
• 1 Stück 8051 80C51 Entwickler Board
• 1 Stück 5V Steckernetzteil

Der STC12C5A60S2 ist ein Single – Chip – Mikrocontroller CPU basierend auf der schnellen 1T 80C51 Architektur von STC.

Der STC12C5A60S2 unterstützt den 8051 / 80C51 Standard / Befehlssatz.

8051 80C51 Single Chip MCU Entwickler Set

Der STC12C5A60S2 unterstützt sowohl

• ISP (In – System – Prgogrammierung)
• IAP (In -Anwendung – Programmierung)

sodass eine anwenderfreundliche Entwicklung gewährleistet ist.

• 1 pcs. STC12C5A60S2 Single 8051 80C51 DIP-40 IC
• 1 pcs. 8051 80C51 Development Board
• 1 pcs. 5V Power Supply

The STC12C5A60S2 series is a single-chip microcontroller based on a high performance 1T architecture 80C51 CPU, produced by STC.

With the enhanced kernel, STC12C5A60S2 series execute instructions in 1~6 clock cycles (about 6~7 times the rate of a standard 8051 device), and has a fully compatible instruction set with industrial-standard 80C51 series microcontroller.

8051 80C51 Single Chip MCU Development Set

TheSTC12C5A60S2supports

•  ISP (In-System-Programming)
• IAP (In-Application- Programming)

STC12C5A60S2 Sincle Chip MCU Features:

• Available
  only STC12C4A60S2
  DIP-40 IC
  Development Set incl. Development Board and 5V Power Supply
• Enhanced 80C51 Central Processing Unit ,1T per machine cycle, faster 6~7 times than the rate of a standard 8051 MCU
• 3.5V – 5.5V Operating voltage range
• Operating frequency range: 0- 35MHz, is equivalent to standard 8051:0~420MHz
• On-chip 60K FLASH program memory with flexible ISP/IAP capability
• On-chip 1280 byte RAM: 256 byte scratch-pad RAM and 1024 bytes of auxiliary RAM
• Be capable of addressing up to 64K byte of external RAM
• Dual Data Pointer (DPTR) to speed up data movement
• Code protection for flash memory access
• Excellent noise immunity, very low power consumption
• four 16-bit timer/counter, be compatible with Timer0/Timer1 of standard 8051, 2-channel PCA can be available as two timers.
• 10 vector-address, 4 level priority interrupt capability
• One enhanced UART with hardware address-recognition and frame-error detection function
• Secondary UART with self baud-rate generator
• One 15 bits Watch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
• SPI Master/Slave communication interface
• Two channel Programmable Counter Array (PCA)
• 10-bit, 8-channel Analog-to-Digital Converter (ADC)
• Simple internal RC oscillator and external crystal clock
• Power control:
  idle mode(all interrupt can wake up IDLE mode)
  power-down mode(external interrupt can
  wake up Power-Down mode) and
  slow down mode
• Power down mode can be woken-up by PCA_pin, RXD_pin, T0/T1 pin and external interrupts (INT0, INT1)
• 36 programmable I/O ports are available
• Programmable clock output Function. T0 output the clock on P3.4,T1 output the clock on P3.5, BRT output the clock on P1.0
• External low-voltage detector function(P4.6, the EA pin at the pin location of standard 8051)